42 research outputs found
Physical Time-Varying Transfer Functions as Generic Low-Overhead Power-SCA Countermeasure
Mathematically-secure cryptographic algorithms leak significant side channel
information through their power supplies when implemented on a physical
platform. These side channel leakages can be exploited by an attacker to
extract the secret key of an embedded device. The existing state-of-the-art
countermeasures mainly focus on the power balancing, gate-level masking, or
signal-to-noise (SNR) reduction using noise injection and signature
attenuation, all of which suffer either from the limitations of high power/area
overheads, performance degradation or are not synthesizable. In this article,
we propose a generic low-overhead digital-friendly power SCA countermeasure
utilizing physical Time-Varying Transfer Functions (TVTF) by randomly shuffling
distributed switched capacitors to significantly obfuscate the traces in the
time domain. System-level simulation results of the TVTF-AES implemented in
TSMC 65nm CMOS technology show > 4000x MTD improvement over the unprotected
implementation with nearly 1.25x power and 1.2x area overheads, and without any
performance degradation
High Efficiency Power Side-Channel Attack Immunity using Noise Injection in Attenuated Signature Domain
With the advancement of technology in the last few decades, leading to the
widespread availability of miniaturized sensors and internet-connected things
(IoT), security of electronic devices has become a top priority. Side-channel
attack (SCA) is one of the prominent methods to break the security of an
encryption system by exploiting the information leaked from the physical
devices. Correlational power attack (CPA) is an efficient power side-channel
attack technique, which analyses the correlation between the estimated and
measured supply current traces to extract the secret key. The existing
countermeasures to the power attacks are mainly based on reducing the SNR of
the leaked data, or introducing large overhead using techniques like power
balancing. This paper presents an attenuated signature AES (AS-AES), which
resists SCA with minimal noise current overhead. AS-AES uses a shunt
low-drop-out (LDO) regulator to suppress the AES current signature by 400x in
the supply current traces. The shunt LDO has been fabricated and validated in
130 nm CMOS technology. System-level implementation of the AS-AES along with
noise injection, shows that the system remains secure even after 50K
encryptions, with 10x reduction in power overhead compared to that of noise
addition alone.Comment: IEEE International Symposium on Hardware Oriented Security and Trust
(HOST) 201